FIG. 9 is a perspective view illustrating a prior art micro-strip type chip carrier. In this figure, reference numeral 1 designates a grounding metal base comprising copper-tungsten. A dielectric layer 2 comprising a ceramic is provided on the grounding metal base 1. A transmission line 6 is provided on the surface of the dielectric layer 2. The dielectric layer 2 insulates the transmission line 6 from the grounding metal base 1. The dielectric layer 2 has an aperture in the center thereof, in which an IC chip bonding part 4 for bonding a microwave IC chip 30 is provided. The rear surface of the IC chip bonding part 4 is connected to the grounding metal base 1.
An IC chip 30 is fixed on the IC chip bonding part 4 by solder or adhesive. An electrical signal is transmitted through the transmission line 6 to the IC chip 30. Although this package has an advantage in that the parasitic capacitance and parasitic inductance are shielded, it has a disadvantage in that it cannot be hermetically sealed due to its configuration. In addition, the IC chip 30 and wires are exposed and this package has, in particular, no durability against the mechanical breakage. Therefore, it cannot be used in applications which require package reliability. The frequency of this package is approximately up to 30 GHz.
FIG. 10 is a perspective view illustrating a structure of a prior art dielectric material feed-through type metal package. FIG. 12 is a perspective view illustrating the package of FIG. 10 which is hermetically sealed. In FIGS. 10 and 12, reference numeral 1 designates a grounding metal base. A transmission line 6 is provided on the grounding metal base 1. This transmission line 6 is insulated from the grounding metal base 1 by a ceramic dielectric material layer 2. An IC chip bonding part 4 for bonding an IC chip 30 is provided in the aperture formed in the center of the grounding metal base 1, and a metal collar 8 is provided surrounding the IC chip 30.
The IC chip 30 is fixed on the IC chip bonding part 4 by solder or an adhesive. An electrical signal is transmitted through the transmission line 6 to the chip 30. As shown in FIG. 12, a metal lid 7 is put on the collar 8, protecting the IC chip 30 and forming an airtight enclosure. This package has advantages of airtightness, good shielding properties, and an enhanced high frequency characteristic, so that it can be used up to 20 GHz. However, it has a disadvantage in that the production cost is extremely high.
FIG. 11 is a perspective view illustrating a structure of prior art tri-plate type multi-layer ceramic package. FIG. 13 is side view illustrating the package of FIG. 11 which is hermetically sealed. In FIGS. 11 and 13, a lower-side dielectric layer 2b is provided on a lower-layer grounding metal 1b and an upper-layer grounding metal 1a is provided on an upper-side dielectric layer 2a. A transmission line 6 is provided on the junction surface between the lower-side dielectric layer 2b and the upperside dielectric layer 2a. An IC chip bonding part 4 for fixing an IC chip 30 is provided in the aperture formed in the center of the upper-layer grounding metal 1a and the upper-side dielectric layer 2a. The IC chip bonding part 4 is connected to the lower-layer grounding metal 1b via a through hole.
The IC chip 30 is fixed on the IC chip bonding part 4 by solder or an adhesive. Then, as shown in FIG. 13, a metal lid 7 is put on the package, protecting the IC chip 30 and forming an airtight enclosure. This package has a merit of low production cost, approximately 1000 yen ($7.00) each. However, since the upper-layer grounding metal 1a and the lower-layer grounding metal 1b are not directly in contact with each other, when metal is plated on the side surface of the package to connect the two grounding metals 1a and 1b, the perimeter of the metal layer surrounding the transmission line 6 in the cross section perpendicular to the transmission line 6 is so long that the inductance component increases, reducing shielding and high frequency characteristics. Therefore, this package is used only up to several GHz.
Meanwhile, a prior art package having a pseudo-coaxial line configuration is disclosed in the Japanese Published Patent Application No. 1-135102. FIG. 14(a) is an exploded view illustrating a structure of this prior art package. FIG. 14(b) is a cross-sectional view taken along a line A--A in FIG. 14(a). In FIGS. 14(a) and 14(b), a ceramic layer 20b is provided on a lower-layer grounding metal 24 and a signal conductor 21 is provided in the center of the surface of the ceramic layer 20b. Then, a ceramic layer 20a having a cut-off portion for exposing the signal conductor 21 is provided on the ceramic layer 20b. A plurality of cylindrical via holes 22 are provided penetrating the ceramic layers 20a and 20b. The via holes 22 electrically connect the upper surface of the ceramic layers with the lower surfaces of the ceramic layers. An upper-layer grounding plate 23 is provided on the ceramic layer 20a. The upper-layer grounding metal 23 and the lower-layer grounding metal 24 are connected to each other through the via holes 22 thereby to shield the signal conductor 21.
FIG. 15 is a plan view illustrating a structure of an alternative of the package shown in FIG. 14(a). In this structure, the cylindrical through holes 22 are provided close to each other, resulting in an enhancement of the shielding characteristic.
FIG. 16(a) is a cross-sectional side view illustrating a structure of another alternative of the package shown in FIG. 14(a). FIG. 16(b) is a plan view illustrating a ceramic layer 20c of the package shown in FIG. 16(a). In FIGS. 16(a) and 16(b), a plurality of cylindrical via holes 22 are produced penetrating the ceramic layers 20a to 20e and arranged at slightly different positions to produce a pseudo-coaxial configuration, and the upper surface of a through hole (22) conductor and the lower surface of another through hole (22) conductor are electrically connected by a metal plate 25 which is provided therebetween.
The prior art microwave IC packages constructed as described above have the following drawbacks.
Since the micro-strip type chip carrier shown in FIG. 9 cannot be sealed due to its construction, no good airtight enclosure is obtained. In addition, since the chip and the wires of the package are exposed, the package has no durability against mechanical breakage. Therefore, it is impossible to use the package of FIG. 9 for applications which require reliability.
The dielectric feed-through type metal package shown in FIG. 10 has a good shielding characteristic and a good high frequency characteristic, but the production cost thereof is extremely high.
In the tri-plate type multiple layer ceramic package shown in FIG. 11, when the upper-layer and lower-layer metal plates are connected using metals plated on the side surfaces or external surfaces of the package, the inductance component may be increased, adversely affecting the shielding characteristic and the high-frequency characteristics.
The package shown in FIGS. 14(a) and 15 is shielded by the through holes, but the shielding in parallel to the signal line is not sufficient.
Furthermore, it is difficult to form the package of FIG. 16(a)in a pseudo-coaxial configuration by shifting the through holes and a simulation is required therefor. Since the width W.sub.3 of signal line is almost equal to the width W.sub.4 of the metal plate, leakage increases, resulting in a transmission loss and a deterioration in the voltage standing wave ratio caused by generation of higher propagation modes.